Ярлыки

_GetPixelIndex (1) _SetPixelIndex (1) 3-phase (1) 800x480 (1) АЦП (1) генератор (1) синхронный усилитель (2) структура (1) учебный курс (1) шаговый двигатель (1) ШИМ (2) accert (1) AD7608 (1) AD8429 (1) ADC (5) amplifer (1) arccos (1) arcsin (1) arctang (2) arctg (3) ARM (2) arm_sqrt_q15 (2) assembler (6) ASSERT (1) atan (2) bit (1) Bitband (1) boot (3) bootlloader (1) BUTTON (1) C (5) C# (1) CAN (2) CC2530 (5) CMSIS (4) command (1) Cordic (1) Core746I (1) CubeMX (4) DBGMCU (2) debug (2) debug.ini (1) delegate (1) Digital Potentiometers (1) DigitalPOT (1) Discovery (1) DMA (9) DMA2D (1) DSP (1) DSP library (1) DWT (1) EFM32 (5) EmWin (9) EXTI (1) FATFS (1) FMC (2) FreeRTOS (2) gl868-dual cmux (1) GPIO (4) GUI (2) GUIBuilder (1) GUIDRV_CompactColor_16 (1) HAL (3) HappyGecko (1) Hard Fault (2) heap (1) I2C (1) ID (1) ILI9320 (1) ILI9325 (1) Initialisation (1) InitLTDC (1) Instrumentithion (1) Interrupt (4) ITR (1) JTAG (1) Keil (5) LCDConf (2) lock-in (1) LTCD (1) LTDC (3) main (1) memory (1) MINI_STM32 Revision 01 (1) nBoot0 (1) NVIC (1) OnePulse (2) OSAL (4) pack (1) phase (1) printf (3) Pulse (1) PWM (12) RCC (2) RCR (1) Register (1) RESET (2) RS232 (3) RSS (1) RTC (3) RTOS-RTX (1) RTT (1) RTX-RTOS (1) SDCard (1) SDRAM (6) Segger (2) SPI (3) sqrt (3) SSD1298 (1) SSD1963 (1) Standart Peripherial Library (3) STANDBAY (1) startup (1) STemWin (8) stepper motor (1) STlink (2) STM32 (17) STM32429ZI (1) STM32Cube (1) STM32DBG.IN (1) STM32F (28) STM32F0 (4) STM32F1 (13) STM32F4 (10) STM32F4 Discovery (1) STM32F407ZG (1) STM32F429 (2) STM32F746 (1) STOP (1) string (1) struct (1) SWD (1) SWD JTAG (1) Synhronization (1) system_stm32f4xx.c (1) SystemInit (1) SysTick (1) task (4) telit (1) TIM (27) typedef (1) UART (1) USART (9) viewer (2) WM_PAINT (1) Z-stack (5) ZigBee (5)

вторник, 6 декабря 2016 г.

SSD1963 Init collection

My Init file for SSD1963

void Init_SSD1963(void)
{
Lcd_Write_Cmd(0xe0); //START PLL
Lcd_Write_Data(0x01);  //Set bit Enable PLL
HAL_Delay(50);  //Wait  to let the PLL stable
 
Lcd_Write_Cmd(0xe0); //START PLL
Lcd_Write_Data(0x03);  //(0 - Use reference clock as system clock   1 -  Use PLL output as system clock)
HAL_Delay(5);

Lcd_Write_Cmd(0x01); // Software reset
HAL_Delay(10);
 
Lcd_Write_Cmd(0xe2);//Set the PLL
Lcd_Write_Data(0x1d);
Lcd_Write_Data(0x02);
Lcd_Write_Data(0x54);
 
Lcd_Write_Cmd(0xe6);//Set the LSHIFT (pixel clock) frequency
Lcd_Write_Data(0x04);
Lcd_Write_Data(0x6f);
Lcd_Write_Data(0x47);

Lcd_Write_Cmd(0xf0);//SET pixel data I/F format=8bit
Lcd_Write_Data(0x03); //pixel data format, 0x03 is 16bit(565 format);0x00 is for 8-bit

Lcd_Write_Cmd(0xb0); //LCD SPECIFICATION   SET LCD MODE SET TFT 18Bits MODE
Lcd_Write_Data(0x20);  //dput(0x08); //SET TFT MODE & hsync+Vsync+DEN MODE
Lcd_Write_Data(0x80);  //
Lcd_Write_Data(0x03);//SET horizontal size=800-1 HightByte
Lcd_Write_Data(0x1f);//1f   //SET horizontal size=800-1 LowByte
Lcd_Write_Data(0x01);//SET vertical size=480-1 HightByte
Lcd_Write_Data(0xdf);//df   //SET vertical size=480-1 LowByte
Lcd_Write_Data(0x00);//   dput(0x2d); //SET even/odd line RGB seq.=RGB

//Set front porch and back porch
Lcd_Write_Cmd(0xb4);// SET HBP
Lcd_Write_Data(0x04); // SET HSYNC Total = // 0x04 SET HSYNC Total = 1056  // hsync of  value in app note is 8367 & not 1056
Lcd_Write_Data(0x20);
Lcd_Write_Data(0x00); // SET HBP = //SET HBP = 256 // HBP of value in app note is 163 & not 256
Lcd_Write_Data(0x2e);  //SET VBP 0 //  earlier value of VBP = 8 , write data ( 0x07)
Lcd_Write_Data(0xd2);// SET VBP
Lcd_Write_Data(0x00);
Lcd_Write_Data(0x00);// SET Hsync pulse start position
Lcd_Write_Data(0x00);// SET Hsync pulse subpixel start position

Lcd_Write_Cmd(0xb6);    //SET VBP,
Lcd_Write_Data(0x02); //0x02 SET Vsync total 526 = 525 + 1  // vsync of  value in app note is 496  & not 525
Lcd_Write_Data(0x0d);
Lcd_Write_Data(0x00); //SET VBP = 45                // HBP of value in app note is 4 & not 45
Lcd_Write_Data(0x17);// 0x2d
Lcd_Write_Data(0x16);// 0x00 SET Vsync pulse 0     // SET Vsync pulse in app note is 2
Lcd_Write_Data(0x00); //SET Vsync pulse start position
Lcd_Write_Data(0x00);

Lcd_Write_Cmd(0x2a);    //SET column address
Lcd_Write_Data(0x00); //SET start column address=0
Lcd_Write_Data(0x00);
Lcd_Write_Data(0x03); //SET end column address=799
Lcd_Write_Data(0x1f);

Lcd_Write_Cmd(0x2b);;     //SET page address
Lcd_Write_Data(0x00);//SET start page address=0
Lcd_Write_Data(0x00);
Lcd_Write_Data(0x01);//SET end page address=479
Lcd_Write_Data(0xdf);  //1f

Lcd_Write_Cmd(0x036);  //SET RGB BGR
Lcd_Write_Data(0x08);  //1 BGR  0  RGB

Lcd_Write_Cmd(0xb8);
Lcd_Write_Data(0x0f);
Lcd_Write_Data(0x01);

Lcd_Write_Cmd(0xba);
Lcd_Write_Data(0x01);

Lcd_Write_Cmd(0x29);// SET display on

Lcd_Write_Cmd(0x2c);
} 

 // Horizontal and vertical display resolution (from the glass datasheet)
  #define DISP_HOR_RESOLUTION  800
 #define DISP_VER_RESOLUTION   480

  // Horizontal synchronization timing in pixels (from the glass datasheet)
  #define DISP_HOR_PULSE_WIDTH 48   // 1..48 (Min .. Typ)
  #define DISP_HOR_BACK_PORCH 40  // Typ
  #define DISP_HOR_FRONT_PORCH 40  // Typ

  // Vertical synchronization timing in lines (from the glass datasheet)
  #define DISP_VER_PULSE_WIDTH 3   // Typ
  #define DISP_VER_BACK_PORCH 29 // Typ
  #define DISP_VER_FRONT_PORCH 13  // Typ


// *****************************************************************************
// Инициализация контроллера SSD1963 for PCLK, HSYNC, VSYNC etc
void SSD1963_Init(void)
{
  // Програмный сброс
  set_reg(0x01); // Soft reset (Сбрасываются все регистры кроме 0xE0 и 0xE5)
  LCD_Delay(5); // Нужно ожидать 5 мс
  
  // * Настройка PLL на 100 МГц перед его включением (для фнешего кыарца 10 МГц) *
  // Установка множителя M для PLL: VCO = crystal freq * (N+1) (где - 250MHz < VCO < 800MHz)
  // Частота PLL = VCO/M, макс 110MHz. 
  set_reg(0xE2);  // Уст. PLL для OSC = 10MHz
  set_data(0x1D); // Множитель N = 29, VCO (>250MHz)= OSC*(N+1), VCO = 300MHz
  set_data(0x02); // Делитель M = 2, PLL = 300/(M+1) = 100MHz
  set_data(0x04); // Установить использование M (множителя) и N (делителя) значений

  // * Запуск PLL *
  set_reg(0xE0); // Start PLL command
  set_data(0x01); // включить PLL
  LCD_Delay(1); // ожидание стабильности (100 мскек) минимум
  
  set_reg(0xE0); // Start PLL command again
  set_data(0x03); // Теперь PLL выход используя как системные часы
  LCD_Delay(1); // ожидание стабильности (100 мксек) минимум
  
  // Програмный сброс после включения PLL
  set_reg(0x01); // Soft reset
 LCD_Delay(10000);
  
  // Установить LSHIFT частоту, т.е DCLK для TFT если частота PLL 100 МГц set previously
  // Значение DCLK для HSD050IDW1-A20 равняется 33 МГц (по даташиту)
  // 33 MHz = 100MHz*(LCDC_FPR + 1)/2^20
  // LCDC_FPR = 346030 (0x547AE)
  // Time per line = (DISP_HOR_RESOLUTION + DISP_HOR_PULSE_WIDTH + DISP_HOR_BACK_PORCH +
  //                          DISP_HOR_FRONT_PORCH)/30.3 нсек = 928/30.3 = 30.6 нсек
  set_reg(0xE6);
  set_data(0x05);
  set_data(0x47);
  set_data(0xAE);  
  
  //Set panel mode, varies from individual manufacturer
  set_reg(0xB0);
// set_data(0x10); // set 18-bit for 7" panel TY700TFT800480
// set_data(0x80); // set TTL mode  
// set_data(0x08);  // SET TFT MODE & hsync + Vsync + DEN MODE
  set_data(0x20);  // set 24-bit 
  set_data(0x00);  // SET TFT MODE & hsync + Vsync + DEN MODE
  set_data(((DISP_HOR_RESOLUTION - 1) >> 8) & 0x0007);   // Set panel size
  set_data((DISP_HOR_RESOLUTION - 1) & 0x00FF);
  set_data(((DISP_VER_RESOLUTION - 1) >> 8) & 0x0007);
  set_data((DISP_VER_RESOLUTION - 1) & 0x00FF);
  set_data(0x00);  // RGB sequence

  // Set horizontal period
  set_reg(0xB4);
  #define HT (DISP_HOR_RESOLUTION + DISP_HOR_PULSE_WIDTH + DISP_HOR_BACK_PORCH + DISP_HOR_FRONT_PORCH)
  set_data(((HT - 1) >> 8) & 0x0007); // HT - horizontal total period
  set_data((HT - 1) & 0x00FF); // ...
  #define HPS (DISP_HOR_PULSE_WIDTH + DISP_HOR_BACK_PORCH)
  set_data(((HPS - 1) >> 8) & 0x0007); // HPS: Horizontal Sync Pulse Start Position
  set_data((HPS - 1) & 0x00FF); // ...
  set_data(DISP_HOR_PULSE_WIDTH - 1); // HPW: Horizontal Sync Pulse Width
  set_data(0x00); // LPS: Horizontal Display Period Start Position
  set_data(0x00); // ...
  set_data(0x00); // LPSPP: Horizontal Sync Pulse Subpixel Start Position
// (for serial TFT interface). Dummy value for TFT interface.
  // Set vertical period
  set_reg(0xB6);
  #define VT (DISP_VER_RESOLUTION + DISP_VER_PULSE_WIDTH + DISP_VER_BACK_PORCH +
            DISP_VER_FRONT_PORCH)  set_data(((VT - 1) >> 8) & 0x0007); // VT: Vertical Total   
  set_data((VT - 1) & 0x00FF); // ...
  #define VSP (DISP_VER_PULSE_WIDTH + DISP_VER_BACK_PORCH)
  set_data(((VSP - 1) >> 8) & 0x0007); // VPS: Vertical Sync Pulse Start Position
  set_data((VSP - 1) & 0x00FF); // ...
  set_data(DISP_VER_PULSE_WIDTH - 1); // VPW: Vertical Sync Pulse Width
  set_data(0x00); // FPS: Vertical Display Period Start Position
  set_data(0x00); // ...

  // SET Address mode 
  set_reg(0x36);
  set_data(0x00);  
//  set_data(0xA0);
//  set_data(0x03);  
  
  //Set pixel format, i.e. the bpp (команда была удалена см. даташит вер 1.1)
// set_reg(0x3A);
// set_data(0x50); // set 16bpp  

  // Set pixel data interface
  set_reg(0xF0);
  set_data(0x03); // 16-bit(565 format) data
  set_reg(0x29); // Turn on display; show the image on display
  LCD_Delay(5); // Нужно ожидать 5 мс  
  return;
}

=====================================================================

LCD_WriteCom(0x00E6); //PLL setting for PCLK, depends on resolution
LCD_WriteRAM(0x0003);
LCD_WriteRAM(0x00ff);
LCD_WriteRAM(0x00ff);

LCD_WriteCom(0x00B0); //LCD SPECIFICATION
/*LCD_WriteRAM(0x0027);
LCD_WriteRAM(0x0000);
LCD_WriteRAM((HDP>>8)&0X00FF);  //Set HDP
LCD_WriteRAM(HDP&0X00FF);
   LCD_WriteRAM((VDP>>8)&0X00FF);  //Set VDP
LCD_WriteRAM(VDP&0X00FF);
   LCD_WriteRAM(0x0000);*/
LCD_WriteRAM(0x0000);
LCD_WriteRAM(0x0004);  // 0x0000 18-bit mode
LCD_WriteRAM((HDP>>8)&0X00FF);  //Set HDP
LCD_WriteRAM(HDP&0X00FF);
   LCD_WriteRAM((VDP>>8)&0X00FF);  //Set VDP
LCD_WriteRAM(VDP&0X00FF);
   LCD_WriteRAM(0x0000);
   LCD_WriteCom(0x00B4); //HSYNC
LCD_WriteRAM((HT>>8)&0X00FF);  //Set HT
LCD_WriteRAM(HT&0X00FF);
LCD_WriteRAM((HPS>>8)&0X00FF);  //Set HPS
LCD_WriteRAM(HPS&0X00FF);
LCD_WriteRAM(HPW);   //Set HPW
LCD_WriteRAM((LPS>>8)&0X00FF);  //Set HPS
LCD_WriteRAM(LPS&0X00FF);
LCD_WriteRAM(0x0000);
LCD_WriteCom(0x00B6); //VSYNC
LCD_WriteRAM((VT>>8)&0X00FF);   //Set VT
LCD_WriteRAM(VT&0X00FF);
LCD_WriteRAM((VPS>>8)&0X00FF);  //Set VPS
LCD_WriteRAM(VPS&0X00FF);
LCD_WriteRAM(VPW);   //Set VPW
LCD_WriteRAM((FPS>>8)&0X00FF);  //Set FPS
LCD_WriteRAM(FPS&0X00FF);
LCD_WriteCom(0x00BA);
LCD_WriteRAM(0x000F);    //GPIO[3:0] out 1
LCD_WriteCom(0x00B8);
LCD_WriteRAM(0x0007);    //GPIO3=input, GPIO[2:0]=output
LCD_WriteRAM(0x0001);    //GPIO0 normal
LCD_WriteCom(0x0036); //rotation
LCD_WriteRAM(0x0008);
LCD_WriteCom(0x00F0); //pixel data interface
LCD_WriteRAM(0x0003);
delay_ms(50);
LCD_WriteCom(0x0029); //display on
LCD_WriteCom(0x00d0);
LCD_WriteRAM(0x000d);
}  
    delay_ms(50);   /* delay 50 ms */
//    LCD_SetFont(&LCD_DEFAULT_FONT);

==================================================================

uint16_t test;

LCD1963_InitIO();
UB_Systick_Pause_ms(10);
LCD1963_InitFSMC ();
UB_Systick_Pause_ms(10);

LCD_Reset_low ();
UB_Systick_Pause_ms(10);
LCD_Reset_high ();
UB_Systick_Pause_ms(10);

LCD1963_WriteCommand (SSD1963_SOFT_RESET );
UB_Systick_Pause_ms(10);

LCD1963_WriteCommand (SSD1963_SET_PLL_MN); // config PLL to 120 Mhz
LCD1963_WriteData (0x23); // 36*10Mhz / 3 = 120 MHz
LCD1963_WriteData (0x02); // N => 36, M => 3
LCD1963_WriteData (0x54);

LCD1963_WriteCommand (SSD1963_SET_PLL);
LCD1963_WriteData (0x01); // enable PLL

UB_Systick_Pause_ms(1); // wait until pll locked

LCD1963_WriteCommand (SSD1963_SET_PLL);
LCD1963_WriteData (0x03);
// set PLL as system clock
LCD1963_WriteCommand (SSD1963_SOFT_RESET );
UB_Systick_Pause_ms(10);

LCD1963_WriteCommand (SSD1963_GET_PLL_STATUS);
test = LCD_RAM; // test = 4 if PLL is locked

UB_Systick_Pause_ms(5);

LCD1963_WriteCommand (SSD1963_SET_LCD_MODE);
LCD1963_WriteData (0x0C); // 18 Bit,  FRC, no Dithering, Vsync, Hsync active low, Data latch @ falling edge
LCD1963_WriteData (0x00); // TFT Mode, Hsync+Vsync+De Mode
LCD1963_WriteData (0x03); // Set horizontal Panel Size = 799 -> 0x31F
LCD1963_WriteData (0x1F);
LCD1963_WriteData (0x01); // Set vertical Panel Size = 479 ->
LCD1963_WriteData (0xDF);
LCD1963_WriteData (0x00);

/////////////////// checked

LCD1963_WriteCommand (SSD1963_SET_PIXEL_DATA_INTERFACE);
LCD1963_WriteData (0x03); // 16 Bit - 565 Format



LCD1963_WriteCommand (SSD1963_SET_LSHIFT_FREQ);
LCD1963_WriteData (0x04); // (Lshiftfrequency / PLLfrequency ) *2^20 = LCDC_FPR
LCD1963_WriteData (0x93); // (40Mhz / 120 MHz ) * 2^20 = 349524 = 0x55554
LCD1963_WriteData (0xE0); //  33Mhz / 120 Mhz ) * 2^20 = 0x46666 alt



/////////////////// checked


LCD1963_WriteCommand (SSD1963_SET_HORI_PERIOD);
LCD1963_WriteData(mHIGH(TFT_HSYNC_PERIOD));
LCD1963_WriteData(mLOW(TFT_HSYNC_PERIOD));
LCD1963_WriteData(mHIGH((TFT_HSYNC_PULSE + TFT_HSYNC_BACK_PORCH)));
LCD1963_WriteData(mLOW((TFT_HSYNC_PULSE + TFT_HSYNC_BACK_PORCH)));
LCD1963_WriteData(TFT_HSYNC_PULSE);
LCD1963_WriteData(0x00);
LCD1963_WriteData(0x00);
LCD1963_WriteData(0x00);


LCD1963_WriteCommand (SSD1963_SET_VERT_PERIOD);
LCD1963_WriteData(mHIGH(TFT_VSYNC_PERIOD));
LCD1963_WriteData(mLOW(TFT_VSYNC_PERIOD));
LCD1963_WriteData(mHIGH((TFT_VSYNC_PULSE + TFT_VSYNC_BACK_PORCH)));
LCD1963_WriteData(mLOW((TFT_VSYNC_PULSE + TFT_VSYNC_BACK_PORCH)));
LCD1963_WriteData(TFT_VSYNC_PULSE);
LCD1963_WriteData(0x00);
LCD1963_WriteData(0x00);


LCD1963_WriteData(0x0060);

LCD1963_WriteCommand(SSD1963_SET_DISPLAY_ON);

UB_Systick_Pause_ms(5);

LCD_Backlight_on ();

======================================================================


Комментариев нет:

Отправить комментарий