DMA to USART (UART) OUT

Вывод на USART1 c использованием DMA буфера, без участия процессора


#include "stm32f10x.h"
/*******************************************************************/
#define BAUDRATE 115200
#define DMA_BUFFER_SIZE 8
uint32_t TimingDelay;
uint32_t mlsec;
DMA_InitTypeDef dma;
uint8_t dataBuffer[8] = {'0', '1', '2', '3', '4', '5', '6', '7'};// '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'};
uint8_t   dt[16];
/*******************************************************************/
void RCC_Configuration(void)
{
  // Enable HSE
RCC->CR|=RCC_CR_HSEON;
//RTC
RCC->CR|=RCC_BDCR_RTCSEL;
RCC->CR|=RCC_BDCR_RTCEN;
  // Flash 1 wait state
FLASH->ACR=FLASH_ACR_PRFTBE|FLASH_ACR_LATENCY_2;
// USB clock=PLLCLK, HCLK=SYSCLK, PCLK2=HCLK, PCLK1=HCLK/2, PLLCLK=8MHz*9=72MHz
RCC->CFGR=RCC_CFGR_USBPRE|RCC_CFGR_PLLMULL9|RCC_CFGR_PLLSRC_HSE|RCC_CFGR_PPRE1_DIV2;
  // Wait till HSE is ready
while ((RCC->CR&RCC_CR_HSERDY)==0);
  // Enable PLL
RCC->CR|=RCC_CR_PLLON;
// Wait till PLL is ready
while ((RCC->CR&RCC_CR_PLLRDY)==0);
// Select PLL as system clock source
RCC->CFGR|=RCC_CFGR_SW_PLL;
// Wait till PLL is used as system clock source
while ((RCC->CFGR&RCC_CFGR_SWS)!=RCC_CFGR_SWS_PLL);
// APB1ENR SPI2 clock enable
RCC->APB1ENR=RCC_APB1ENR_SPI2EN|RCC_APB1ENR_TIM2EN;
// APB2ENR SPI1, TIM1, GPIOC, GPIOB, GPIOA, AFIO clock enable
RCC->APB2ENR=RCC_APB2ENR_SPI1EN|RCC_APB2ENR_TIM1EN|RCC_APB2ENR_IOPCEN|RCC_APB2ENR_IOPBEN|RCC_APB2ENR_IOPAEN|RCC_APB2ENR_AFIOEN;
// AHBENR DMA1 clock enable
RCC->AHBENR=RCC_AHBENR_DMA1EN;
// PWR_CR
PWR->CR=PWR_CR_PLS_2V5|PWR_CR_PVDE;
}
void initAll(void)
{
GPIO_InitTypeDef port;
USART_InitTypeDef usart;

/*******************************************************************/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);

DMA_StructInit(&dma);
dma.DMA_PeripheralBaseAddr = (uint32_t)&(USART1->DR);
dma.DMA_MemoryBaseAddr = (uint32_t)&dataBuffer[0];
dma.DMA_DIR = DMA_DIR_PeripheralDST;
dma.DMA_BufferSize = DMA_BUFFER_SIZE;
dma.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
dma.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
dma.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_Init(DMA1_Channel4, &dma);

GPIO_StructInit(&port);
port.GPIO_Mode = GPIO_Mode_AF_PP;
port.GPIO_Pin = GPIO_Pin_9;
port.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &port);

port.GPIO_Mode = GPIO_Mode_AF_PP;
port.GPIO_Pin = GPIO_Pin_10;
port.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &port);

USART_StructInit(&usart);
usart.USART_BaudRate = BAUDRATE;
USART_Init(USART1, &usart);

//while(USART1->SR & USART_SR_RXNE) USART1->DR; //Зачистка буферов

DMA1_Channel5->CCR = 0; //запретить работу канала
DMA1_Channel5->CPAR = (uint32_t)dt;
DMA1_Channel5->CMAR = (uint32_t)&USART1->DR; //адрес буфера в памяти
DMA1_Channel5->CNDTR = 16; //загрузить количество данных для обмена

DMA1->IFCR |= DMA1_FLAG_TC5;
USART_ClearFlag(USART1, USART_FLAG_RXNE|USART_FLAG_IDLE);
DMA1_Channel5->CCR = DMA_CCR5_MINC|DMA_CCR5_EN; //разрешить работу канала
}
void Delay_ms(__IO uint32_t nTime)
{ 
  TimingDelay = nTime;
  while(TimingDelay != 0)
{
TimingDelay--;
}
}
//==========================================================================
int main()
{
    __enable_irq();
RCC_Configuration();
    initAll();
SysTick_Config(60000);
    USART_Cmd(USART1, ENABLE);
    USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE);
    DMA_Cmd(DMA1_Channel4, ENABLE);
 while(1)
 {
/* Delay_ms(0x800000);
DMA_Cmd(DMA1_Channel4, DISABLE);  
DMA1_Channel4->CNDTR = 8;
DMA1->IFCR=0;
DMA_Cmd(DMA1_Channel4, ENABLE);  
*/  
 }
}

void SysTick_Handler(void)
{
mlsec++;
if(mlsec==1000)
{
mlsec=0;
// dma.DMA_MemoryBaseAddr = (uint32_t)&dataBuffer[0];
DMA_Cmd(DMA1_Channel4, DISABLE);
DMA1_Channel4->CNDTR = 8;
DMA1->IFCR=0;
DMA_Cmd(DMA1_Channel4, ENABLE);  
 
}
}