STM32F4 & F0 CubeMX for Digital Potentiometers MCP453X/455X/463X/465X

MCP453X/455X/463X/465X

6.2.4 ADDRESSING
The address byte is the first byte received following the START condition from the master device. The address contains four (or more) fixed bits and (up to) three user defined hardware address bits (pins A2, A1, and A0). These 7-bits address the desired I2C device. The A7:A4 address bits are fixed to “0101” and the device appends the value of following three address pins (A2, A1, A0). Address pins that are not present on the device are pulled up (a bit value of ‘1’). Since there are up to three address bits controlled by hardware pins, there may be up to eight MCP4XXX devices on the same I2C bus. Figure 6-9 shows the slave address byte format, which contains the seven address bits. There is also a read/ write bit. Table 6-2 shows the fixed address for each device.

Байт адреса - первый байт посылаемый мастером после старта . Адрес содержит 4 (или больше) фиксированных бита и до 3-х битов, задаваемых пользователем с помощью соответствующих установок входов  A2, A1, A0  в зависимости от типа устройства. Если адресные пины в устройстве отсутствуют, то их значение принимаются равным "1".  Три адресных разряда позволяют увеличить количество учтройств, одновременно подключенных к шине. Рис 6-9 показыват назначение 7 бит адресного байта для вадомого (slave) устройства. После адресных битов идет бит чтения/записи (read/write).  В Табл. 6-2 приведены адреса для каждого типа устройств.

There are up to three hardware pins used to specify the device address. The number of address pins is determined by the part number. Address 0 is multiplexed with the High Voltage Command (HVC) function. So the state of A0 is latched on the MCP4XXX’s POR/BOR event.The HVC pin has an internal resistor connection to the MCP45XX/46XXs internal VDD signal. The state of the A2 and A1 pins should be static, that is they should be tied high or tied low. 

Вывод А0 используется для High-Voltge комманд. Для  MCP45XX/46XXs устройств он подтянут к "1". 

При обращении к ведомому устройству типа  MCP45X1 его адрес 0x2F или 0x2E.

Пример передачи команды от master к slave для MCP4551 form Arduino for I2C Digital Potentiometer

  Wire.beginTransmission(0x2F);  // transmit to device address 0x2F is specified in datasheet
  Wire.write(0x00);                        // sends instruction byte - Write data
  Wire.write(0x55);                        // sends potentiometer value byte
  Wire.endTransmission();             // stop transmitting

Transmitt with Arduino board (byte 0x00, 0x55)

I2C signal from STM32F042 with Saleae Logic (transmitted byte - 0x16, 0x00). Address byte 0x5E.

STM32F0 (STM32F042) BOOT problem (User Option bit - nBoot0 )

Start STM32 ST-LINK Target -> Connect

With STM32 ST-LINK after Taregt -> Option bytes

nBoot0_SW_Cfg -
Cheked: The BOOT0 is bonded to GPIO pin (PB8 for small packages,  PF11 for big packages)
Uncheked: Its allows user to disable BOOT0 pin completely and use User Option bit ( nBoot0 ).

If nBOOT0 is cheked (=1) Main Flash memory is selected as boot area.

Table from reference manual

bxCAN STM32F042 transmit and receive.

Transmitter

#include "stm32f0xx_hal.h"

/* USER CODE BEGIN Includes */

/* USER CODE END Includes */

/* Private variables ---------------------------------------------------------*/
CAN_HandleTypeDef hcan;

I2C_HandleTypeDef hi2c1;

/* USER CODE BEGIN PV */
/* Private variables ---------------------------------------------------------*/

unsigned int val_Tx = 0, val_Rx = 0;              /* Globals used for display */
volatile uint32_t msTicks;                        /* counts 1ms timeTicks     */

CAN bus

STMicroelectronics CAN Controller for Cortex-M3 Processors.

Shown is a block diagram of the CAN controller. Here are the main points of all CAN controllers:
1. I/O Pins: These connect to the CAN transceiver chip pins R and D as already described.
2. Parallel-Serial Converters: CAN is a serial bus while the processor is parallel. Conversion happens here.
3. Tx mailbox: The messages to be transmitted are written here. ID, data (if any) and the DLC go here.
4. Acceptance Filter: This passes only specified messages to the processor via the FIFOs. By default at RESET, these filters pass all messages to the FIFOs. Your software must configure them to filter messages.
5. FIFO 0 & 1: Each Receive FIFO can hold 3 CAN messages. They provide a buffering system to the processor.
6. Control, Status, Configuration registers: Your software must configure these registers, usually at initialization. Various flags and switches are found here. Examples are set CAN speed, request transmission, manage receive messages, enable interrupts and obtain diagnostic information. Keil provides examples on how to set and use these registers. All CAN controllers have the same basic architecture. Different controllers will have differences in the number of receive FIFO buffers, transmit buffers, size of acceptance filters and the bit mapping, addresses and definitions of the various configuration registers. All CAN controllers are licensed by Robert Bosch GmbH in Germany and therefore they are able to exert considerable control over basic CAN attributes to make them consistent with various manufacturers. This means that all CAN controllers can communicate with other brands in a reliable and predictable manner.

The CAN frame has many fields but we can simplify this to a Programming Model as shown. These fields are accessed by your software through the CAN controller registers.

IDE: Identifier Extension: 1 bit - specifies if the ID field to be transmitted is 11 or 29 bits:
If IDE = 0, then the ID is 11 bits. If IDE = 1, then the ID is 29 bits.
ID: Identifier: 11 or 29 bits as set by the IDE field. This part of the CAN frame sets the priority.
DLC: Data Length Code: 4 bits - specifies number of data bytes in the frame from 0 through 8.
Data Bytes: 0 through 8 bytes.