STM32F4 Timers for Periodic Interrupts

#include <stm32f4xx.h>
#include "other_stuff.h"

#define   APB1_FREQ        42000000                           // Clock driving TIM3
#define   CNT_FREQ         21000000                           // TIM3 counter clock (prescaled APB1)
#define   IT_PER_SEC       2000                               // Interrupts per second
#define   TIM3_PULSE       ((CNT_FREQ) / (IT_PER_SEC))        // Output compare reg value
#define   TIM_PRESCALER    (((APB1_FREQ) / (CNT_FREQ))-1)     // APB1 prescaler

uint16_t current_count = 0;                                   // To sample the counter

static void TIM3_Config(void);

int main()
{
  TIM_TimeBaseInitTypeDef TIM3_TimeBase;                      // Time base structure
  TIM_OCInitTypeDef       TIM3_OC;                            // Output Compare structure
 
  TIM3_Config();

  TIM3_TimeBase.TIM_ClockDivision = 0;                        // Not dividing
  TIM3_TimeBase.TIM_CounterMode   = TIM_CounterMode_Up;       // Upcounting configuration
  TIM3_TimeBase.TIM_Period        = 65535;                    // Autoreload value (ARR) 
  TIM3_TimeBase.TIM_Prescaler     = TIM_PRESCALER;            // Dividing APB1 by 2
  TIM_TimeBaseInit(TIM3, &TIM3_TimeBase);                     // Initializing Time Base structure

  TIM3_OC.TIM_OCMode      = TIM_OCMode_Toggle;                // Output compare toggling mode
  TIM3_OC.TIM_OutputState = TIM_OutputState_Enable;           // Enabling the Output Compare state
  TIM3_OC.TIM_OCPolarity  = TIM_OCPolarity_Low;               // Reverse polarity
  TIM3_OC.TIM_Pulse       = TIM3_PULSE;                       // Output Compare 1 reg value
  TIM_OC1Init(TIM3, &TIM3_OC);                                // Initializing Output Compare 1 structure
  TIM_OC1PreloadConfig(TIM3, TIM_OCPreload_Disable);          // Disabling Ch.1 Output Compare preload

  TIM_Cmd(TIM3, ENABLE);                                      // Ready, Set, Go!
  TIM_ITConfig(TIM3, TIM_IT_CC1, ENABLE);                     // Enabling TIM3 Ch.1 interrupts
 
  while(1)
  {
    //os_sys_init(init_task);                                 // Starting the RTX kernel
  }

}


static void TIM3_Config(void)
{
  GPIO_InitTypeDef gpio_C;                                    // GPIOC structure
  NVIC_InitTypeDef NVIC_TIM3;                                 // NVIC structure
  
  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);       // Clocking GPIOC (AHB1 = 84MHz)
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);        // Clocking TIM3  (APB1 = 42MHz)
   
  gpio_C.GPIO_Pin   = GPIO_Pin_6;                             // Ch.1 (PC6)
  gpio_C.GPIO_Mode  = GPIO_Mode_AF;                           // Alternative function
  gpio_C.GPIO_Speed = GPIO_Fast_Speed;                        // 50MHz
  gpio_C.GPIO_OType = GPIO_OType_PP;                          // Push-pull
  gpio_C.GPIO_PuPd  = GPIO_PuPd_UP ;                          // Pulling-up
  GPIO_Init(GPIOC, &gpio_C);                                  // Initializing GPIOC structure
  GPIO_PinAFConfig(GPIOC, GPIO_PinSource6, GPIO_AF_TIM3);     // Routing TIM3 output to PC6

  NVIC_TIM3.NVIC_IRQChannel                   = TIM3_IRQn;    // Specifying the channel (stm32f4xx.h)
  NVIC_TIM3.NVIC_IRQChannelPreemptionPriority = 0;            // Only matters for multiple interrupts
  NVIC_TIM3.NVIC_IRQChannelSubPriority        = 0;            // Only matters for multiple interrupts
  NVIC_TIM3.NVIC_IRQChannelCmd                = ENABLE;       // Enabling global interrupt
  NVIC_Init(&NVIC_TIM3);                                      // Initializing NVIC structure
}



void TIM3_IRQHandler(void)
{
  if (TIM_GetITStatus(TIM3, TIM_IT_CC1) != RESET)             // Just a precaution (RESET = 0) 
  {
    TIM_ClearITPendingBit(TIM3, TIM_IT_CC1);                  // Clear TIM3 Ch.1 flag
    current_count = TIM_GetCapture1(TIM3);                    // Get current counter value
    TIM_SetCompare1(TIM3, current_count + TIM3_PULSE);        // Set Output Compare 1 to the new value
  }
}